1.3 Road Map
Chapter 2 will provide a brief introduction to previous research pertaining to the optimization and acceleration of perception applications. Chapter 3 describes the basic principles behind power reduction in CMOS circuits and introduces metrics that will be used later for evaluating the perception processor. This is followed by Chapters 4 and Chapter 5, which provide an introduction to the foundations of speech recognition and a performance analysis of the CMU Sphinx 3.2 speech recognition system respectively. Chapter 6 presents the design and evaluation of an ASIC coprocessor for a dominant phase of Sphinx. Computer vision algorithms used in the FaceRec application mentioned previously are introduced in Chapter 7 and the application itself is characterized in Chapter 8. The architecture of the perception processor is elaborated in Chapter 9, and its performance and energy efficiency are analyzed in Chapter 10. Chapter 11 draws conclusions and highlights important results. Finally, Chapter 12 points out avenues for future research.