SiliconIntelligence

3.3 Process Normalization

Comparing the power and performance advantages of any perception-optimized architecture to its competition presents some problems. Typically, the competition is a commercial general purpose processor that is implemented in a different CMOS process than the one used to implement the perception processor. To make a fair comparison possible, it is necessary to normalize power and delay of circuits for the minimum feature size of the CMOS process. Three different scaling regimes will be used to evaluate the different architectures in Chapter 10 : constant field scaling, voltage scaling and frequency scaling.



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Binu Mathew